In a thin film transistor(Thin Film Transistor) display, generally, gates of respective TFTs of a pixel region are provided with gate drive signals from a gate drive circuit. The gate drive circuit may be formed on an array substrate of a liquid crystal display by an array process, that is, GOA (Gate driver on Array) process. Such an integration process not only saves the cost, but also can achieve an aesthetic design for symmetry on both sides of a liquid crystal panel while omitting the Bonding region of a gate IC (Integrated Circuit) and the wiring space for Fan-out, thus realizing a design of narrow bezel.
An existing GOA circuit, as illustrated in FIG. 1, consists of multiple shift registers SR (1), SR (2), . . . SR (N). Each shift register SR (n) is used for providing a gate scan signal to a gate line connected with a signal output terminal Output of the shift register SR(n), inputting a reset signal to a reset signal terminal Reset of the previous shift register SR (n−1) adjacent thereto, inputting an input signal to an input signal terminal Input and an input signal control terminal Vin of the subsequent shift register SR (n+1) adjacent thereto, and outputting a gate drive signal when the input signal is received by the input signal control terminal Vin and the input signal terminal Input of shift register SR (n) of each stage.
However, when the display needs to divide the time for displaying one frame of picture into multiple periods of time and a time internal of a certain duration is needed between respective the periods of time, the input signal would be attenuated in the above GOA circuit between respective the periods of time, and the longer the time interval is, the more severe the input signal would be attenuated, thus causing the output of the entire GOA circuit in abnormal status.
Therefore, how to prevent the signal from being attenuated in the GOA circuit within a preset time interval is a technical problem to be solved urgently by those skilled in the art.